A digital-to-analog-converter (DAC) generates an analog signal (voltage or current type) in response to a digital data. The DAC can be applied in many applications such as communication interface, Ethernet PHY, xDSL controller). Please refer to FIG. 1, showing a sample of a conventional DAC. The conventional DAC 10 comprises a plurality of DAC units 11, 12, . . . and 1n. Each DAC unit 11, 12, . . . , in comprises a switch 111, 121, . . . , 1n1 and a current source 113, 123, . . . , 1n3. The switch 111 (121, . . . , 1n1) can be implemented by a pair of transistors (1111, 1113) ((1211, 1213), . . . , (1n11, 1n13)). Each of the current sources 113, 123, . . . , and 1n3 is implemented by a respective transistor. The respective gate of the pair of transistors 1111, 1113, 1211, 1213, . . . , 1n11, 1n13 of each DAC unit 11, 12, . . . , 1n receives a digital signal D1+, D1−, D2+, D2−, . . . , Dn+, Dn−, provides analog currents to a load (not shown in FIG. 1) between PAD1 and PAD2 according to the digital signal, and produces an output signal Vout between PAD1 and PAD2.
With the development of the semiconductor process, the operational adapted is gradually decreasing, and it is more and more difficult to fulfill the requirement for many specifications such as 802.3. For example, an amplitude of the transmission signal is 5V for the 10M transmission mode of the Ethernet. Please refer to FIG. 2, showing a circuit diagram of a conventional Current Steering DAC. The DAC 20 comprises a plurality of DAC units 11, 12, . . . and 1n (the diagram only shows one DAC unit 11), and an impedance 13 comprising a first matching impedance Z1 and a second matching impedance Z2.
When the DAC 20 is implemented with a 0.18 μm CMOS Process, the operational voltage VDD is 1.8V. Please refer to FIG. 2 again, wherein the single-side amplitude peak value of the first analog signal Vout is 1.25V, and there is only 0.55V (1.8-1.25) at two terminals of the DAC unit 11 when the voltage between the first pad PAD1 and the second pad PAD2 reaches the peak value. Therefore, it is possible to affect the working voltage of the current source 113 (implemented by a transistor 113) of the DAC unit 11, and make the operational point of the transistor 113 enter a triode region, which results in a reduced current and a decreased amplitude of the DAC unit 11. The mentioned phenomenon will be more serious if the operational voltage VDD is even lower.
The conventional solution is to increase the area of the transistor 113 for decreasing the saturation drain-source voltage (VDS,SAT) thereof, which makes the operational point of the transistor 113 difficult to enter the triode region. However, the mentioned solution will increase the whole area of the circuit, and thus increase the cost as well as decrease the competitive ability accordingly.
In order to overcome the drawbacks in the prior art, a current output circuit with bias control and a method thereof are provided in the present invention.